WebAssembly multi-threading does not spawn operating system kernel threads directly from WASM bytecode. Instead, a host JavaScript application creates multiple Web Workers and allocates a shared WebAssembly.Memory instance configured with shared: true (backed by a SharedArrayBuffer). When the compiled WebAssembly module is instantiated inside each worker, all workers receive a reference to the identical shared linear memory. Each worker thread runs an independent WASM instance executing instructions against the shared memory space, using atomic instructions to coordinate state.

A spinlock repeatedly polls an atomic variable in a tight loop (e.g. while (atomic_cas(&lock, 0, 1) != 0)), burning 100% of a CPU core and causing severe cache coherency traffic (MESI cache invalidations across CPU cores). In contrast, memory.atomic.wait32 (the WebAssembly equivalent of the Linux futex system call) puts the calling thread to sleep at the OS scheduler level if the memory value matches an expected condition. When another thread releases the lock, it invokes memory.atomic.notify, waking up one or more sleeping threads with zero wasted CPU cycles.

Following the disclosure of Spectre and Meltdown CPU speculative execution side-channel attacks, browsers disabled SharedArrayBuffer by default due to high-precision timer capabilities. To enable SharedArrayBuffer and multithreaded WebAssembly, the hosting web server must serve two Cross-Origin Isolation HTTP headers: 1) Cross-Origin-Opener-Policy: same-origin (COOP), isolating the browsing context from cross-origin popups; 2) Cross-Origin-Embedder-Policy: require-corp (COEP) or credentialless, ensuring all subresources explicitly permit cross-origin embedding.

CPU hardware coordinates shared memory across cores in fixed-size cache lines (typically 64 bytes on modern x86 and ARM processors). If two independent threads frequently modify distinct atomic variables located within the same 64-byte memory slice, the CPU cache coherency controllers repeatedly invalidate and bounce the entire cache line back and forth between core L1/L2 caches (cache line bouncing). To prevent false sharing in WebAssembly, shared atomic structures must be padded or aligned to 64-byte boundaries (e.g. alignas(64) in C/Rust or #[repr(align(64))]).